commit 7d9095ff233112dcc031790930da431772381e98
parent 6e21e3a3b8d279f5ab7665b1d6a247c8cf44c061
Author: Kyle Milz <krwmilz@gmail.com>
Date: Thu, 18 Nov 2021 00:57:27 +0000
update diff against 6.9 sources
Diffstat:
2 files changed, 53 insertions(+), 66 deletions(-)
diff --git a/imac_radeondrm_atombios_encoders.diff b/imac_radeondrm_atombios_encoders.diff
@@ -1,11 +1,11 @@
Index: radeon/atombios_encoders.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/radeon/atombios_encoders.c,v
-retrieving revision 1.14
-diff -u -p -r1.14 atombios_encoders.c
---- radeon/atombios_encoders.c 14 Apr 2019 10:14:53 -0000 1.14
-+++ radeon/atombios_encoders.c 18 Oct 2020 18:57:59 -0000
-@@ -2191,12 +2191,13 @@ int radeon_atom_pick_dig_encoder(struct
+retrieving revision 1.15
+diff -u -p -r1.15 atombios_encoders.c
+--- radeon/atombios_encoders.c 8 Jun 2020 04:48:15 -0000 1.15
++++ radeon/atombios_encoders.c 21 Jul 2021 01:04:00 -0000
+@@ -2189,12 +2189,13 @@ int radeon_atom_pick_dig_encoder(struct
}
/*
@@ -27,11 +27,11 @@ diff -u -p -r1.14 atombios_encoders.c
Index: radeon/radeon.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/radeon/radeon.h,v
-retrieving revision 1.23
-diff -u -p -r1.23 radeon.h
---- radeon/radeon.h 4 May 2019 11:34:48 -0000 1.23
-+++ radeon/radeon.h 18 Oct 2020 18:57:59 -0000
-@@ -2687,6 +2687,7 @@ void r100_pll_errata_after_index(struct
+retrieving revision 1.25
+diff -u -p -r1.25 radeon.h
+--- radeon/radeon.h 28 Oct 2020 10:27:21 -0000 1.25
++++ radeon/radeon.h 21 Jul 2021 01:04:00 -0000
+@@ -2681,6 +2681,7 @@ void r100_pll_errata_after_index(struct
(rdev->family == CHIP_RS740) || \
(rdev->family >= CHIP_R600))
#define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620))
diff --git a/imac_radeondrm_display.diff b/imac_radeondrm_display.diff
@@ -1,20 +1,11 @@
Index: radeon/radeon_display.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/radeon/radeon_display.c,v
-retrieving revision 1.19
-diff -u -p -r1.19 radeon_display.c
---- radeon/radeon_display.c 27 Feb 2020 05:34:13 -0000 1.19
-+++ radeon/radeon_display.c 18 Oct 2020 18:57:59 -0000
-@@ -37,8 +37,6 @@
- #include <drm/drm_plane_helper.h>
- #include <drm/drm_edid.h>
-
--#include <linux/gcd.h>
--
- static void avivo_crtc_load_lut(struct drm_crtc *crtc)
- {
- struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-@@ -865,89 +863,66 @@ static bool radeon_setup_enc_conn(struct
+retrieving revision 1.21
+diff -u -p -r1.21 radeon_display.c
+--- radeon/radeon_display.c 22 Aug 2020 04:30:55 -0000 1.21
++++ radeon/radeon_display.c 21 Jul 2021 01:04:00 -0000
+@@ -872,89 +872,66 @@ static bool radeon_setup_enc_conn(struct
}
/* avivo */
@@ -36,26 +27,6 @@ diff -u -p -r1.19 radeon_display.c
+ else if (*fb_div < pll->min_feedback_div)
+ *fb_div = pll->min_feedback_div;
+}
-+
-+static u32 avivo_get_post_div(struct radeon_pll *pll,
-+ u32 target_clock)
-+{
-+ u32 vco, post_div, tmp;
-+
-+ if (pll->flags & RADEON_PLL_USE_POST_DIV)
-+ return pll->post_div;
-+
-+ if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP) {
-+ if (pll->flags & RADEON_PLL_IS_LCD)
-+ vco = pll->lcd_pll_out_min;
-+ else
-+ vco = pll->pll_out_min;
-+ } else {
-+ if (pll->flags & RADEON_PLL_IS_LCD)
-+ vco = pll->lcd_pll_out_max;
-+ else
-+ vco = pll->pll_out_max;
-+ }
-/**
- * avivo_reduce_ratio - fractional number reduction
@@ -71,9 +42,15 @@ diff -u -p -r1.19 radeon_display.c
- */
-static void avivo_reduce_ratio(unsigned *nom, unsigned *den,
- unsigned nom_min, unsigned den_min)
--{
++static u32 avivo_get_post_div(struct radeon_pll *pll,
++ u32 target_clock)
+ {
- unsigned tmp;
--
++ u32 vco, post_div, tmp;
++
++ if (pll->flags & RADEON_PLL_USE_POST_DIV)
++ return pll->post_div;
+
- /* reduce the numbers to a simpler ratio */
- tmp = gcd(*nom, *den);
- *nom /= tmp;
@@ -84,8 +61,18 @@ diff -u -p -r1.19 radeon_display.c
- tmp = DIV_ROUND_UP(nom_min, *nom);
- *nom *= tmp;
- *den *= tmp;
-- }
--
++ if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP) {
++ if (pll->flags & RADEON_PLL_IS_LCD)
++ vco = pll->lcd_pll_out_min;
++ else
++ vco = pll->pll_out_min;
++ } else {
++ if (pll->flags & RADEON_PLL_IS_LCD)
++ vco = pll->lcd_pll_out_max;
++ else
++ vco = pll->pll_out_max;
+ }
+
- /* make sure the denominator is large enough */
- if (*den < den_min) {
- tmp = DIV_ROUND_UP(den_min, *den);
@@ -158,23 +145,23 @@ diff -u -p -r1.19 radeon_display.c
void radeon_compute_pll_avivo(struct radeon_pll *pll,
u32 freq,
u32 *dot_clock_p,
-@@ -956,138 +931,55 @@ void radeon_compute_pll_avivo(struct rad
+@@ -963,138 +940,55 @@ void radeon_compute_pll_avivo(struct rad
u32 *ref_div_p,
u32 *post_div_p)
{
- unsigned target_clock = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ?
- freq : freq / 10;
--
-- unsigned fb_div_min, fb_div_max, fb_div;
-- unsigned post_div_min, post_div_max, post_div;
-- unsigned ref_div_min, ref_div_max, ref_div;
-- unsigned post_div_best, diff_best;
-- unsigned nom, den;
+ u32 target_clock = freq / 10;
+ u32 post_div = avivo_get_post_div(pll, target_clock);
+ u32 ref_div = pll->min_ref_div;
+ u32 fb_div = 0, frac_fb_div = 0, tmp;
+- unsigned fb_div_min, fb_div_max, fb_div;
+- unsigned post_div_min, post_div_max, post_div;
+- unsigned ref_div_min, ref_div_max, ref_div;
+- unsigned post_div_best, diff_best;
+- unsigned nom, den;
+-
- /* determine allowed feedback divider range */
- fb_div_min = pll->min_feedback_div;
- fb_div_max = pll->max_feedback_div;
@@ -205,19 +192,14 @@ diff -u -p -r1.19 radeon_display.c
- post_div_max = pll->post_div;
- } else {
- unsigned vco_min, vco_max;
--
++ ref_div = pll->reference_div;
+
- if (pll->flags & RADEON_PLL_IS_LCD) {
- vco_min = pll->lcd_pll_out_min;
- vco_max = pll->lcd_pll_out_max;
- } else {
- vco_min = pll->pll_out_min;
- vco_max = pll->pll_out_max;
-- }
-+ ref_div = pll->reference_div;
-
-- if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
-- vco_min *= 10;
-- vco_max *= 10;
+ if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
+ avivo_get_fb_div(pll, target_clock, post_div, ref_div, &fb_div,
+ &frac_fb_div);
@@ -228,6 +210,14 @@ diff -u -p -r1.19 radeon_display.c
+ frac_fb_div++;
}
+- if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
+- vco_min *= 10;
+- vco_max *= 10;
++ if (frac_fb_div >= 10) {
++ fb_div++;
++ frac_fb_div = 0;
+ }
+-
- post_div_min = vco_min / target_clock;
- if ((target_clock * post_div_min) < vco_min)
- ++post_div_min;
@@ -267,10 +257,7 @@ diff -u -p -r1.19 radeon_display.c
-
- post_div_best = post_div;
- diff_best = diff;
-+ if (frac_fb_div >= 10) {
-+ fb_div++;
-+ frac_fb_div = 0;
- }
+- }
- }
- post_div = post_div_best;
-
